Next-Generation DesignSync User Meeting 2026
Where AI, IP strategy and ecosystem collaboration converge to move semiconductor innovation forward.
As semiconductor technology advances into increasingly smaller process nodes, engineering organizations are managing unprecedented design complexity. Multi-terabyte SoC designs, globally distributed engineering teams, and compressed product schedules are placing significant pressure on traditional design data management solutions.
The Next-Generation DesignSync User Meeting 2026 brings together semiconductor and engineering professionals to explore what’s driving that acceleration and what it takes to stay ahead.
Join us for an immersive day where we share experiences and address questions that matter most to semiconductor engineering teams, including:
- How can I improve engineering productivity for extremely large semiconductor designs?
- How can I accelerate synchronization of design assets across globally distributed teams?
- How can I reduce delays during design integration and manufacturing handoff?
- How can I maintain business continuity while evolving to a next-gen, scalable platform capable of supporting future generations of semiconductor designs?
You’ll hear directly from professional peers and our team of experts, participate in interactive discussions, experience live demonstrations and explore deployment options that fit your organization’s environment.
Whether you’re evaluating solutions, deepening your current deployment or preparing for what’s next, this is where you’ll find the expertise, the conversations and the clarity to move forward with confidence.
Share Your Story: Call for Speakers
Have you successfully tackled design complexity with DesignSync, or do you have a story to share about your journey? We want to hear from you!
If you're interested in sharing your experiences, challenges, and successes with a community of semiconductor and engineering peers, we invite you to submit a speaking proposal for the Next-Generation DesignSync User Meeting 2026.
Speakers
Sarah AHMAD
Sarah AHMAD
Sarah AHMAD is the ENOVIA Director of Semiconductor & Software Solutions. As a technology and business leader, Sarah is focused on helping high-tech and semiconductor organizations navigate the increasing complexity of chip design and development. She sets strategic direction and defines solutions that enable semiconductor companies to better manage complex design data, intellectual property (IP), IP reuse, governance, and collaboration across the semiconductor design lifecycle.
Drawing on decades of industry experience, Sarah brings a practical perspective on the challenges facing engineering organizations today, from managing growing volumes of design data and reusable IP to establishing effective governance and enabling cross-functional collaboration throughout the design cycle.
Thai DO
Thai DO
Thai DO is an enterprise sales professional at Dassault Systèmes, helping semiconductor and high-tech companies modernize how they manage complex engineering data. He works with leading technology organizations to connect fragmented design environments, improve IP reuse, and enable collaboration across global engineering teams. Drawing on experience spanning EDA, design-data management, and enterprise transformation, Thai brings a practical perspective on turning engineering challenges into measurable business outcomes.
Bijan DOROSTKAR
Bijan DOROSTKAR
Bijan DOROSTKAR is an Industry Process Expert Senior Specialist within the Industry Process Success team focused on Semiconductor Solutions under the Enovia Brand at Dassault Systèmes. Starting with a background in Analog/Mixed-Signal Circuit Design, he has been providing applications engineering, customer training, customer support and product enablement in the field of Design Data Management for over 26 of the 36 years of his career in the Semiconductor Industry. He has a BSEE, MSEE and MBA from the University of Southern California.
Janet BARBA
Janet BARBA
Peter HAYNES
Peter HAYNES
Radoslav PRAHOV
Radoslav PRAHOV
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Read the ENOVIA Blog
Read the ENOVIA Blog
As product complexity accelerates across the High-Tech and Semiconductor industries, legacy PLM systems are becoming a major barrier to innovation. From fragmented BOMs and disconnected teams to rising compliance demands and IP security risks, manufacturers need a smarter approach to product development. Explore how Next-Gen PLM, Virtual Twins and robust IP management are helping companies achieve digital continuity, improve collaboration and accelerate sustainable innovation in an increasingly complex global market.