Next-Generation DesignSync User Meeting 2026 - Agenda

8:30 AM - 9:00 AM CST

Guest Check-In & Light Breakfast

9:00 AM - 9:15 AM CST Welcome

Welcome & Opening: Meeting Objectives & the DesignSync Community

9:15 AM - 9:45 AM CST

The Future of the Global Semiconductor Industry

The semiconductor industry is being driven by AI, high-performance computing, automotive, and connected technologies, while facing challenges including design c...

9:45 AM - 10:30 AM CST

Global Semiconductor Ecosystem Powered by 3DEXPERIENCE and Q&A

10:30 AM - 10:45 AM CST Break

Morning Refreshments & Networking

10:45 AM - 11:15 AM CST

Strategies for Semiconductor Product Development: Strategic IP Generation, Management and Reuse

In today’s fast‑moving semiconductor market, the ability to generate, manage, and reuse intellectual property (IP) is a decisive factor for reducing time‑to‑mar...

11:15 AM - 12:00 PM CST

Global Best Practices in Semiconductor Design Data Management and Q&A

Effective design‑data management is critical for semiconductor teams that operate across multiple sites, time zones, and supply‑chain partners. This session dis...

12:00 PM - 1:00 PM CST Lunch

Lunch & Networking

1:00 PM - 1:15 PM CST

Welcome Back

1:15 PM - 1:45 PM CST

Supercharging Next-Gen Semiconductor Innovation and Ecosystem Collaboration with Semiconductor Engineer

This session outlines proven global strategies for managing semiconductor design data—standardized taxonomies, secure centralized repositories, change‑control w...

1:45 PM - 2:15 PM CST

Live Demonstration: ENOVIA Semiconductor Engineer - DesignSync Continuity and 10x Performance

Experience a live walkthrough of the ENOVIA Semiconductor Engineer role, showing how it delivers seamless data continuity from concept to tape‑out while acceler...

2:15 PM - 3:00 PM CST Break

Customer Use Case: Managing Semiconductor Design Data at Scale and Q&A

This session shares a real‑world example of how a leading semiconductor company scaled its design‑data management across global teams, multiple fabs, and comple...

3:00 PM - 3:15 PM CST

Afternoon Refreshments & Networking

3:15 PM - 3:45 PM CST Roundtable

Five Trends, Five Challenges - and the Path to 10x Performance

3:45 PM - 4:15 PM CST

Ask the Experts: DesignSync and ENOVIA Semiconductor Engineer

Join a panel of ENOVIA Semi engineer and DesignSync experts for an interactive Q&A session. Discover how these solutions enable seamless design‑data continuity,...

4:15 PM - 4:45 PM CST

Customer Roundtable: Lessons, Priorities and Next Moves

Join fellow semiconductor leaders and experts for an open discussion on real‑world experiences managing design data, IP, and collaboration at scale. Participant...

4:45 PM - 5:00 PM CST

Wrap-Up & Key Takeaways

5:00 PM - 6:00 PM CST

Networking Reception

You’re invited to the Event Networking Reception – join us for refreshments, light bites, and great conversation right after today’s sessions. Meet peers, share...